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ld7576/76h/76j/76k 12/5/2007 1 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 green-mode pwm controller with high-voltage start-up circuit and adjustable olp delay time rev. 03 general description the ld7576x series bring high performance, combines with highly integrated functions, protections and emi-improve solution. it?s an ideal solution for those cost-sensitive system, reducing component count and overall system cost. the ld7576x series features near-lossless high voltage startup circuit, green-mode power-saving operation, leading-edge blanking of the current sensing and internal slope compensation. they also consist with more protections of olp (over lo ad protection), ovp (over voltage protection) and otp (over temperature protection) to prevent the circuit damage under abnormal conditions. the ld7576x series are available in dip-8 and sop-8 package. features z high-voltage (500v) startup circuit z current mode control z non-audible-noise green mode control z uvlo (under voltage lockout) z leb (leading-edge blanking) on cs pin z internal slope compensation z ovp (over voltage protection) on vcc z on-chip otp (over temperature protection) z olp (over load protection) z latch mode protection by ct pin z 500ma driving capability z adjustable olp delay time applications z switching ac/dc adaptor and battery charger z open frame switching power supply z lcd monitor/tv power typical application free datasheet http://www..net/
ld7576/76h/76j/76k 2 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 pin configuration yy: year code ww: week code pp: production code sop-8 & dip-8 (top view) 1 8 2 3 4 7 6 5 top mark yywwpp ct comp cs gnd hv nc vcc out ordering information part number protection/frequency package top mark shipping ld7576 ps auto-recovery/65khz sop-8 pb free ld7576ps 2500 /tape & reel ld7576 gs auto-recovery/65khz sop-8 green package ld7576gs 2500 /tape & reel ld7576 pn auto-recovery65khz dip-8 pb free ld7576pn 3600 /tube /carton ld7576j ps auto-recovery/100khz sop-8 pb free ld7576jps 2500 /tape & reel ld7576j gs auto-recovery/100khz sop-8 green package ld7576jgs 2500 /tape & reel ld7576j pn auto-recovery100khz dip-8 pb free ld7576jpn 3600 /tube /carton LD7576H ps latch/65khz sop-8 pb free LD7576Hps 2500 /tape & reel LD7576H gs latch/65khz sop-8 green package LD7576Hgs 2500 /tape & reel LD7576H pn latch/65khz dip-8 pb free LD7576Hpn 3600 /tube /carton ld7576k ps latch/100khz sop-8 pb free ld7576kps 2500 /tape & reel ld7576k gs latch/100khz sop-8 green package ld7576kgs 2500 /tape & reel ld7576k pn latch/100khz dip-8 pb free ld7576kpn 3600 /tube /carton the ld7576 is rohs compliant/ green package. note: 1. oscillating frequency: ld7576/76h: 65khz (typ.), ld7576j/76k: 100khz (typ.). 2. LD7576H/76k features built-in latch-mode function of ovp on vcc pin , olp and on chip otp. 3. ld7576/76j features built-in auto-recovery func tion of ovp on vcc pin olp and on chip otp. free datasheet http://www..net/
ld7576/76h/76j/76k 3 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 pin descriptions pin name function 1 ct this pin is to program the frequency of th e low frequency timer. by connecting a capacitor to ground to set the olp delay time. and this pin can be used for latch mode protection. by pulling this pin lower than 0.8 v, the controller will be entered latch mode until the ac power-on recycling. 2 comp voltage feedback pin (same as the comp pin in uc384x), by connecting a photo-coupler to close the control loop and achieve the regulati on. a high quality ceramic capacitor (x7r) is required for general applications (102pf at least). 3 cs current sense pin, connect to sense the mosfet current 4 gnd ground 5 out gate drive output to drive the external mosfet 6 vcc supply voltage pin 7 nc unconnected pin 8 hv connect this pin to positive terminal of bulk capacitor to provide the startup current for the controller. when vcc voltage trips t he uvlo(on), this hv loop will be off to save the power loss on the startup circuit. free datasheet http://www..net/
ld7576/76h/76j/76k 4 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 block diagram free datasheet http://www..net/
ld7576/76h/76j/76k 5 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 absolute maximum ratings supply voltage vcc 30v high-voltage pin, hv -0.3v~600v comp, ct, cs -0.3 ~7v junction temperature 150 c operating ambient temperature -40 c to 85 c storage temperature range -65 c to 150 c package thermal resistance (sop-8) 160 c/w package thermal resistance (dip-8) 100 c/w power dissipation (sop-8, at ambient temperature = 85 c) 400mw power dissipation (dip-8, at ambient temperature = 85 c) 650mw lead temperature (soldering, 10sec) 260 c esd voltage protection, human body model (except hv pin) 3kv esd voltage protection, machine model 300v gate output current 500ma caution: stresses beyond the ratings specified in ?absolute maximum r atings? may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this s pecification is not implied. recommended operating conditions item min. max. unit supply voltage v cc 11 25 v v cc capacitor 10 47 f ct value 0.047 0.1 f comp pin capacitor 1 100 nf free datasheet http://www..net/
ld7576/76h/76j/76k 6 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 electrical characteristics (t a = +25 o c unless otherwise stated, v cc =15.0v) parameter conditions min typ max units high-voltage supply (hv pin) high-voltage current source vcc< uvlo(on),hv=500v 0.5 1.0 1.5 ma off-state leakage current v cc> uvlo(off),hv=500v 35 a supply voltage (vcc pin) startup current 100 a v comp =0v 2.7 3.5 ma v comp =3v 3.1 4.0 ma olp tripped 0.5 ma ovp tripped 0.6 ma otp tripped 0.5 ma operating current (with 1nf load on out pin) latch protection 2.0 ma uvlo (off) 9.0 10.0 11.0 v uvlo (on) 15.0 16.0 17.0 v ovp level 26.5 28.0 29.5 v voltage feedback (comp pin) short circuit current v comp =0v 1.3 2.2 ma open loop voltage comp pin open 5.6 v green mode threshold vcomp 2.35 v current sensing (cs pin) maximum input voltage 0.80 0.85 0.90 v leading edge blanking time 230 ns input impedance 1 m delay to output 100 ns oscillator for switching frequency ld7576/76h 61.0 65.0 69.0 khz frequency ld7576j/76k 94.0 100.0 106.0 khz ld7576/76h 20 khz green mode frequency ld7576j/76k 32 khz ld7576/76h 4.0 khz trembling frequency ld7576j/76k 6.0 khz temp. stability (-40 c ~105 c) 5 % voltage stability (vcc=11v-25v) 1 % free datasheet http://www..net/
ld7576/76h/76j/76k 7 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 electrical characteristics (t a = +25 o c unless otherwise stated, v cc =15.0v) parameter conditions min typ max units low frequency timer (ct pin) low frequency period ct=0.047 f 4.7 ms temp. stability (-40 c ~105 c) 5 % voltage stability (vcc=11v-25v) 1 % gate drive output (out pin) output low level vcc=15v, io=20ma 1 v output high level vcc=15v, io=20ma 8 v rising time load capacitance=1000pf 50 160 ns falling time load capacitance=1000pf 30 60 ns olp (over load protection) olp trip level 5.0 v ct=0.1 f 110 ms olp delay time ct=0.047 f 45 ms otp (over temperature) otp level 140 c otp hysteresis 30 c latch protection ct pin trip level for latch protection low activated 0.8 v timer for power-on verification 250 ms de-latch vcc level 7.2 8 8.8 v free datasheet http://www..net/
ld7576/76h/76j/76k 8 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 typical performance characteristics hv current source (ma) temperature ( c) fig. 1 hv current source vs. temperature (hv=500v, vcc=0v) 0.7 0.9 1.1 1.3 1.5 -40 0 40 80 120 125 v cs (off) (v) temperature ( c) fig. 2 v cs (off) vs. temperature 0.78 0.80 0.82 0.84 0.86 0.88 -40 0 40 80 120 125 uvlo (on) (v) fig. 3 uvlo (on) vs. temperature temperature ( c) 14.0 14.8 15.6 16.4 17.2 18.0 -40 0 40 80 120 125 uvlo (off) (v) temperature ( c) fig. 4 uvlo (off ) vs. temperature 8 9.6 10.4 12 8.8 -40 0 40 80 120 125 11.2 frequency (khz) fig. 5 frequency vs. temperature temperature ( c) -40 60 62 64 66 68 70 0 40 80 120 125 frequency (khz) temperature ( c) fig. 6 green mode frequency vs. temperature 14 16 18 20 22 24 -40 0 40 80 120 125 free datasheet http://www..net/
ld7576/76h/76j/76k 9 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 frequency (khz) vcc (v) fig. 7 frequency vs. vcc 12 14 16 18 20 22 24 60 11 25 62 64 66 68 70 green mode frequency (khz) vcc (v) fig. 8 green mode frequency vs. vcc 12 14 16 18 20 22 24 11 25 19 21 23 25 17 15 max duty (%) temperature ( c) fig. 9 max duty vs. temperature -40 0 40 80 120 125 65 70 75 80 85 60 vcc ovp (v) temperature ( c) fig. 10 vcc ovp vs. temperature 10 15 20 25 30 35 -40 0 40 80 120 125 v comp (v) temperature ( c) fig. 11 v comp open loop voltage vs. temperature -40 0 40 80 120 125 4.5 5.0 5.5 6.0 6.5 7.0 olp (v) temperature ( c) fig. 12 olp-trip level vs. temperature -40 0 40 80 120 125 3.5 4.0 4.5 5.0 5.5 6.0 free datasheet http://www..net/
ld7576/76h/76j/76k 10 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 application information operation overview as long as the green power requirement becomes a trend and the power saving is getting more and more important for the switching power supplies and switching adaptors, the traditional pwm controllers are not able to support such new requirements. furthermore, the cost and size limitation force the pwm controllers need to be powerful to integrate more functions to reduce the external part counts. the ld7576x series are ideal for these applications to provide an easy and cost effective solution; its detailed features are described as below. internal high-voltage startup circuit and under voltage lockout (uvlo) fig. 13 the traditional circuit provides the startup current through a startup resistor to power up th e pwm controller. however, it consumes too significant powe r to meet the current power saving requirement. in most ca ses, startup resistors carry large resistance. and larger resistance takes longer startup time. to achieve the optimized topology, as shown in figure 13, ld7576x series are implemented with a high-voltage startup circuit for such requi rement. during the startup, a high-voltage current source sinks current from the bulk capacitor to provide the startup current as well as charge the vcc capacitor c1. during the startup transient, the vcc drops lower than the uvlo threshold so the current source will be enabled to supply 1ma current. meanwhile, the vcc supply current is as low as 100 a that most of the hv current is adopted to charge the vcc capacitor. by using such configuration, the turn-on delay time will be almost same no matter under low-line or high-line conditions. as the vcc voltage rises higher than uvlo(on) to power on the ld7576x series and further to deliver the gate drive signal, the high-voltage current source will be disabled and the supply current is provided from the auxiliary winding of the transformer. therefore, it would elimi nate the power loss on the startup circuit and perform highly power saving. an uvlo comparator is embedded to detect the voltage on the vcc pin to ensure the supply voltage enough to power on the ld7576x series pwm controller and in addition to drive the power mosfet. as shown in fig. 14, a hysteresis is provided to prevent the shutdown from the voltage dip during startup. the turn-on and turn-off threshold level are set at 16v and 10.0v, respectively. vcc uvlo(on) uvlo(off) t t hv current 1ma startup current (<100ua) vcc current ~ 0ma (off) operating current (supply from auxiliary winding) fig. 14 current sensing, leading-edge blanking and the negative spike on cs pin the typical current mode pwm controller feedbacks both current signal and voltage signal to close the control loop free datasheet http://www..net/
ld7576/76h/76j/76k 11 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 and achieve regulation. the ld7576x series detects the primary mosfet current from th e cs pin, which is not only for the peak current mode control but also for the pulse-by-pulse current limit. the maximum voltage threshold of the current sensing pin is set at 0.85v. thus the mosfet peak current can be calculated as: s ) max ( peak r v 85 . 0 i = a 230ns leading-edge blanking (leb) time is provided in the input of cs pin to prevent fals e-triggering from the current spike. in the low power applications, if the total pulse width of the turn-on spikes is less than 230ns and the negative spike on the cs pin does not exceed -0.3v, the r-c filter (as shown in figure15) can be eliminated. however, the total pulse width of the turn-on spike is related to the output power, circuit design and pcb layout. it is strongly recommended to add a sm all r-c filter (as shown in figure 16) for higher power application to avoid the cs pin from being damaged by the negative turn-on spike. output stage and maximum duty-cycle an output stage of a cmos buffer, with typical 500ma driving capability, is incorporated to drive a power mosfet directly. and the maximum duty-cycle of ld7576x series are limited to 75% to avoid the transformer saturation. voltage feedback loop the voltage feedback signal is provided from the tl431 on the secondary side through the photo-coupler to the comp pin of ld7576x series. the input stage of ld7576x series, like the uc384x, is with 2 diodes voltage offset to feed the voltage divider with 1/3 ratio, that is, ) v 2 v ( 3 1 ) v f comp pwm ( comparator ? = + a pull-high resistor is embedded internally to optimize the external circuit. generally, an external capacitor in parallel to photo-coupler is required in application. cs vcc gnd ld7576x can be removed if the negative spike is not over spec. (-0.3v). out 230ns blanking time fig. 15 fig. 16 oscillator and switching frequency the switching frequency of ld7576x series are fixed at 65khz and 100khz internally to provide the optimized free datasheet http://www..net/
ld7576/76h/76j/76k 12 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 operations in consideration of the emi performance, thermal treatment, component sizes and transformer design. internal slope compensation a fundamental issue of current mode control is the stability problem when its duty-cycle is operated for more than 50%. to stabilize the control loop, the slope compensation is needed in the traditional uc384x design by injecting the ramp signal from the rt/ct pin through a coupling capacitor. in ld7576x series, the internal slope compensation circuit has been implemented to simplify the external circuit design. on/off control by pulling comp pin lower than 1.2v will disable the gate output pin of ld7576x series immediately. the off mode can be released when the pull-low signal is removed. dual-oscillator green-mode operation there are many different topologies has been implemented in different chips for the green-mode or power saving requirements such as ?burst-m ode control?, ?skipping-cycle mode?, ?variable off-time cont rol ??etc. the basic operation theory of all these approaches intended to reduce the switching cycles under light-load or no-load condition either by skipping some switching pulses or reduce the switching frequency. by using ld proprietary dual-oscillator technique, the green-mode frequency can be well controlled and further to avoid the generation of audible noise. over load protection (olp) - auto recovery to protect the circuit from being damaged during over load condition and short or open loop condition, the ld7576x series were implemented with smart olp function. ld7576/76j features auto recovery function of it, see figure 17 for the waveform. in the example of the fault condition, the feedback system will force the voltage loop toward the saturation and then pull the voltage high on comp pin (vcomp). when the v comp ramps up to the olp threshold of 5v and stays for longer than the olp delay time, the protection will be activate and then turn off the gate output to stop the switching of power circuit. the olp delay time, set by ct pin, is to prevent the false triggering from the power-on and turn-off transient. higher ct value will generate longer olp delay time. the recommended ct value will be 0.1 f when olp delay time is for around 110ms and 0.047 f for around 55ms. a divide-2 counter is implemented to reduce the average power under olp behavior. whenever olp is activated, the output is latched off and the divide-2 counter starts to count the number of uvlo(off). the latch will be released when the 2nd uvlo(off) point started to counted then the output is recovered to switching again. with the protection mechanism, the average input power will be minimized, so that the component temperature and stress can be controlled within the safe operating area. over load protection (olp) - latch mode other than ld7576/76j, the LD7576H/76k features latch mode of smart olp protection. figure 18 shows the waveform under fault condition. the feedback system will force the voltage loop toward the saturation and thus pull the voltage high on comp pi n (vcomp). when the vcomp ramps up to the olp threshold of 5.0v and stays for longer than olp delay time, the protection will be activated and then latch off the gate output to stop switching of the power circuit. the delay time is to prevent the false-triggering from power-on, turn-off transient and peak load condition. as soon as the over load condition is removed, the controller will be kept latched until the vcc drops lower than 8v. it is necessary to start another ac power-on recycling to get the output back. free datasheet http://www..net/
ld7576/76h/76j/76k 13 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 vcc uvlo(on) uvlo(off) t t comp olp 5.0v t out olp delay time switching switching non-switching olp trip level 2nd uvlo(off) olp counter reset fig. 17 uvlo(on) uvlo(off) t ac input voltage t out switching switching non- switching t vcc t 5.0v comp pdr (8v) ac off ac on ( recycle) latch released olp delay time olp trip level fig. 18 ovp (over voltage protection) on vcc - auto recovery the maximum v gs ratings of the power mosfets are mostly for 30v. to prevent the v gs enter fault condition, ld7576x series are implemented with ovp function on vcc. whenever the vcc voltage is higher than the ovp threshold, the output gate drive circuit will be shutdown simultaneously and the switching of the power mosfet is disabled until the next uvlo(on). the vcc ovp functions of ld7576/76j are auto-recoverable. if the ovp condition, usually caused by open-loop of feedback, is not released, the vcc will tripped the ovp level again and re-shutdown the output. the vcc works in hiccup mode. figure 19 shows its operation. otherwise, when the ovp condition is removed, the vcc level will be resumed and the output will automatically return to the normal operation. ovp (over voltage protection) on vcc - latch mode as similar behavior like olp latch-mode, whenever the voltage on the vcc pin is higher than the ovp threshold, the output gate drive circuit will be shutdown simultaneous to latch off the switching of the power mosfet. as soon as the voltage on vcc pin drops below ovp threshold and starts ac-recycling again, it will recover to normal operation. figure 20 shows its operation. fig. 19 free datasheet http://www..net/
ld7576/76h/76j/76k 14 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 fig. 20 pull-low resistor on the gate pin of mosfet the ld7576x series consist with an anti-floating resistor on the out pin to protect the output from abnormally operation or false triggering of mosfet . even so, we still recommend adding an external one on the mosfet gate terminal to provide more protection in case of disconnection of gate resistor r g during power-on. in such single-fault condition, as show in figure 22, the resistor r8 can provide a discharge path to avoid the mosfet from being false-triggered by the current through the gate-to-drain capacitor c gd . therefore, the mosfet is always pulled low and placed in the off-state whenever the gate resistor is disconnected or opened in any case. fig. 21 dt dv cgd i bulk ? = fig. 22 free datasheet http://www..net/
ld7576/76h/76j/76k 15 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 protection resistor on the hi-v path in some other hi-v process and design, there may be a parasitic scr caused around hv pin, vcc and gnd. as shown in figure 23, a small negative spike on the hv pin may trigger this parasitic scr and cause latchup between vcc and gnd. it will intend to damage the chip because of the equivalent short-circuit induced by such latchup behavior. leadtrend?s proprietary of hi -v technology will eliminate parasitic scr in ld7576x series. figure 24 shows the equivalent circuit of ld7576x se ries of hi-v structure. so that ld7576x series are more capable to sustain negative voltage than similar products. however, a 10k resistor is recommended to be added on the hi-v path to play as a current limit resistor whenever a negative voltage is applied. fig. 23 fig. 24 on-chip otp an internal otp circuit is embedded inside the ld7576/76j to provide the worst-case protection for this controller. when the chip temperature rises higher than the trip otp level, the output will be disabled until the chip is cooled down below the hysteresis window. on-chip otp ? latch - mode as similar behavior like olp and ovp on vcc latch-mode, an internal otp circuit are embedded with the LD7576H/76k to provide the worst-case protection for this controller. when the chip temperature rises higher than the trip otp level, it shutdowns the output gate drive circuit simultaneously to latch off the switching of the power mosfet. it won?t recover unless the chip is cooled down below the otp threshold and recycle again. latch-mode protection the latch-mode protection in ld7576 series will be enabled by pulling the ct pin voltage below 0.8v. figure 26 shows the operation. when the latch-mode is tripped, ld7576 series will shutdown the gate output and then latch-off the power supply. unless the controllers re-plug and re-start to drop vcc below 8v, the gate output mode will remain latched. the detailed operation is depicted as figure 26. fig. 26 free datasheet http://www..net/
ld7576/76h/76j/76k 16 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 reference application circuit --- 10w (5v/2a) adapter photocoupler ic1 r7 q1 rs2 ic2 cy1 c5 ct ld7576 ct vcc gnd comp cs out ac input f1 ntc1 cx1 r1a r1b d1a~d1d c1 r6 d4 r4a c4 t1 cr51 c51 r51a l51 c52 r51b c54 fl1 r4b zd51 r56a r56b r54 r52 c55 r55 r53 ic5 z1 4 2 1 3 8 5 d2 c2 6 hv rs1 n l r8 r9 free datasheet http://www..net/
ld7576/76h/76j/76k 17 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 bom p/n component value original r1a n/a r1b n/a r4a 39k , 1206 r4b 39k , 1206 r6 2.2 , 1206 r7 10 , 1206 r8 10k , 1206 r9 10k , 1206 rs1 2.7 , 1206, 1% rs2 2.7 , 1206, 1% r51a 100 , 1206 r51b 100 , 1206 r52 2.49k , 0805, 1% r53 2.49k , 0805, 1% r54 100 , 0805 r55 1k , 0805 r56a 2.7k , 1206 r56b n/a ntc1 5 , 3a 08sp005 fl1 20mh uu9.8 t1 ei-22 l51 2.7 h p/n component value note c1 22 f, 400v l-tec c2 22 f, 50v l-tec c4 1000pf, 1000v, 1206 holystone c5 0.01 f, 16v, 0805 c51 1000pf, 50v, 0805 c52 1000 f, 10v l-tec c54 470 f, 10v l-tec c55 0.022 f, 16v, 0805 ct 0.047 f, 10v, 0805 x5r cx1 0.1 f x-cap cy1 2200pf y-cap d1a 1n4007 d1b 1n4007 d1c 1n4007 d1d 1n4007 d2 ps102r d4 1n4007 q1 2n60b 600v, 2a cr51 sb540 zd51 6v2c ic1 ld7576ps sop-8 ic2 el817b ic51 tl431 1% f1 250v, 1a z1 n/a free datasheet http://www..net/
ld7576/76h/76j/76k 18 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 package information sop-8 dimensions in millimeters dimensions in inch symbols min max min max a 4.801 5.004 0.189 0.197 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.178 0.229 0.007 0.009 i 0.102 0.254 0.004 0.010 j 5.791 6.198 0.228 0.244 m 0.406 1.270 0.016 0.050 0 8 0 8 free datasheet http://www..net/
ld7576/76h/76j/76k 19 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 package information dip-8 dimension in millimeters dimensions in inches symbol min max min max a 9.017 10.160 0.355 0.400 b 6.096 7.112 0.240 0.280 c ----- 5.334 ------ 0.210 d 0.356 0.584 0.014 0.023 e 1.143 1.778 0.045 0.070 f 2.337 2.743 0.092 0.108 i 2.921 3.556 0.115 0.140 j 7.366 8.255 0.29 0.325 l 0.381 ------ 0.015 -------- important notice leadtrend technology corp. reserves the right to make changes or corrections to its products at any time without notice. custom ers should verify the datasheets are current and complete before placing order. free datasheet http://www..net/
ld7576/76h/76j/76k 20 leadtrend technology corporation www.leadtrend.com.tw ld7576-ds-03 december 2007 revision history rev. date change notice 00 3/30/07 original specification. 01 4/23/07 oscillator for switching frequency updated 02 6/21/07 electrical characteristics updated 03 11/30/2007 1. features: adjustable olp delay time 2. detailed description for comp pin capacitor. 3. electrical characteristics/ low frequency timer 4. green package option. 5. block diagram revision. free datasheet http://www..net/

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